龙芯开源社区

 找回密码
 注册新用户(newuser)
查看: 9740|回复: 0

[The H] Processor Whispers - About MIPS and MIPS

  [复制链接]
发表于 2010-10-17 16:50:35 | 显示全部楼层 |阅读模式
本帖最后由 ccdos 于 2010-10-17 16:55 编辑

http://www.h-online.com/newstick ... d-MIPS-1104929.html

11 October 2010, 12:30
Processor Whispers - About MIPS and MIPS
by Andreas Stiller
When two quarrel, the third rejoices: while ARM and Atom were slinging mud at each other, MIPS could advance unhurriedly. And the abbreviation MIPS - with a different meaning - plays an important role in chip manufacturing, too.
......

MIPS also intends to gain ground again with supercomputers, namely with the Loongson (code named Godson) from the Chinese Institute of Computing Technology (ICT) in Shanghai. In the beginning there was a bit of animosity because of MIPS’s licences, but it all got straightened out by an extensive architecture licence in the summer of 2009. And now MIPS benefits greatly from many companies and engineering offices in that country that are increasingly orienting themselves towards the "Chinese" architecture.

STMicroelectronics manufactures the Loongson and sells the Loongson 2F under the name STLS2F01: a single-core with 4-issue super-scalar, 900 MHz clock rate and 4 watts TDP. The newer Loongson 3A with four 1 GHz cores (GS464), two DDR2/3 memory channels as well as two HyperTransport 1.0 controllers and 16 gigaflops at 15 watts is already in production: the Chinese system manufacturer Dawning sells it inside its blade servers. In November, the Dawning 5000L - possibly equipped with 80,000 Loongson processors - might make its way to the top of the upcoming Top500 list of supercomputers as the next petaflops system.

Double AVX

At the Hotchips conference in August, Professor Weiwu Hu presented the next core, the GS464V, whose highlight is its 256 bit wide vector units á la Intel AVX. Unlike Intel’s next processor generation Sandy Bridge, it intensively supports "Fused Multiply Add" and - counting both units - features eight parallel FMA instructions for double precision floating point values. Next year, this core is scheduled to make its debut inside the 8-core chip Loongson 3B, which - at only 1 GHz clock rate and 40 watts TDP - theoretically gets 128 gigaflops. In practice, according to Weiwu Hu, about 93 per cent of this value can be achieved in the matrix multiplication - close to 120 gigaflops in total and 3 gigaflops / Watt.

This performance roughly equals the DGEMM performance of two current Intel Xeon X5680 processors (Westmere-EP) with a total of 12 cores and 3.33 GHz clock rate. However, at 260 watts, the two Xeons eat more than six times as much power.

Another important characteristic of the chip is its ability to quickly emulate x86 code. The ICT has provided special hardware and instructions to ensure that x86 software executes very efficiently in conjunction with the software emulator QEMU. If this works as well as promised, the Loongson computers would immediately be able to draw on a flood of software .

The 8-core Loongson 3B is still designed for the "old" STM 65-nm process, but - according to Weiwu Hu - an upgrade to 28 nm is planned for the 16-core Loongson 3C in 2012, to meet the international standard. He didn’t say who the manufacturing partner will be. TSMC in Taiwan is close, but GLOBALFOUNDRIES is also a possible candidate - just like TSMC it’s a partner of STM.

Fittingly, GLOBALFOUNDRIES will be holding the "Global Technology Conference" GTC2010 in Taiwan and Shanghai this mid-October. The main topics will be 28-nm HKMG technology and the road map towards 22/20 nm. Together with AMD and STMicroelectronics GLOBALFOUNDRIES intends to point out the advantages of the "Gate-First" approach over the "Gate-Last" technology from Intel and TSMC - the latter actually switched from First to Last. The discussions about the advantages and disadvantages of the different process sequences have been going on for a long time now.

Placing the gate first (MIPS, Metal Inserted Poly-Silicon) – as IBM, Infineon, GLOBALFOUNDRIES, Renesas and Samsung do – makes it possible to position the other electrodes, source and drain, easily, exactly and space efficiently. But this way, the gate has to go through the later high-temperature manufacturing steps, something that is problematic for some metal gates. Intel and TSMC prefer the Gate-Last process (RMG, Replacement Metal Gate). Although RMG is much more complex process that requires more space, the gate is only placed after the high-temperature phase is over. Recently, an Barclays bank analyst caused quite a stir when he reported on problems with thermal instabilities and shifts in the transistor threshold voltage in connection with the Gate-First procedure in the 32-nm and 28-nm HKMG process. Naturally, GLOBALFOUNDRIES and Samsung have denied this is a problem.


http://www.h-online.com/newstick ... d-MIPS-1104929.html

本版积分规则

小黑屋|手机版|Archiver|Lemote Inc.  

GMT+8, 2019-1-21 22:40 , Processed in 0.174930 second(s), 17 queries .

快速回复 返回顶部 返回列表